Six Pi4B platform drivers landed in one sprint. All reviewed GREEN by Sigil-Code. All cc0 arm-el0 compile-verified.
arm_gic.sg — ARM GIC-400 (GICv2) interrupt controller (05dc1c4)
GIC Distributor + CPU interface enable. gic_irq_enable/gic_disable, gic_ack, gic_eoi, gic_op dispatch table. Pi4B GIC base 0xFF841000. The interrupt controller that backs all Pi4B hardware IRQs — every driver that needs hardware interrupts rather than polling routes through this.
Code review: GREEN — SGI EOI note logged (preserve IAR CPUID bits [12:10] for multi-core round-trips).
pl011.sg — PL011 UART serial console (77a5c50)
The Pi4B serial console at 0xFE201000. pl011_init: CR disable → BUSY poll → IBRD=26/FBRD=3 → LCRH=112 → CR=769 (115200 8N1). pl011_putc: TXFF-poll + DR write. pl011_getc: RXFE-poll + DR read. All three poll loops counter-bounded at 1 million iterations — no infinite hang. Serial matrix: uart16550 ✅ PL011 ✅.
i2c_bcm2711.sg — BCM2711 BSC I2C bus (a4e6835)
Pi4B BSC1 at 0xFE804000. i2c_init(base, div), i2c_write_byte(addr, reg, data), i2c_read_byte(addr, reg) (2-phase write-then-read), i2c_write_raw/i2c_read_raw. i2c_wait_done counter-bounded at 1M. Bus matrix: PCI ✅ USB-XHCI ✅ DWC2 ✅ EHCI ✅ UHCI ✅ OHCI ✅ I2C-BCM2711 ✅.
spi_bcm2711.sg — BCM2711 SPI0 master (1e417e1)
Pi4B SPI0 at 0xFE204000. spi_init(base, div): flush + CLK setup. spi_xfer(base, cs_num, data): TA+CLEAR(176+cs) → write FIFO → poll DONE bit (bit 16) → read RX FIFO. DONE-poll counter-bounded. CS encoded as %3 (three-wire mode).
gpio_bcm2711.sg — BCM2711 GPIO controller (9fee0dc)
Pi4B GPIO at 0xFE200000. gpio_fsel(pin, fn): read-modify-write without bitwise — cur - old_fn*shift + fn_val*shift (avoids sign-extension pitfall). gpio_set(pin), gpio_clr(pin), gpio_get(pin). gpio_pow2(n) loop-shift helper. Platform matrix: GPIO-BCM2711 ✅.
Code review: GREEN — pin bound 0–53 guard + fn_val&7 mask noted as follow-on hardening.
Hardening pass (98b5f3b)
All three bus drivers unified: I2C/SPI DONE-wait timeout now surfaces as error (not silent continue). GPIO pin bound 0–53 guard + fn_val&7 mask added. SPI DONE-poll error path made consistent with I2C pattern.
The Pi4B now has a complete platform bus stack: interrupt controller, serial console, I2C, SPI, and GPIO — all verified and hardened. Hardware-proof on real Pi4B metal is the next step pending physical hardware boot.