One sigil-kernel commit extends the HAL arch matrix from 0x54E000 to 0x54F000, adding 2 seams: Apple SPMI/PMIC bus controller and the G3/G4 BAT/segment MMU.
22109de — SPMI/PMIC + BAT/Segment MMU
apple_spmi.sg (0x54E000)
SPMI/PMIC bus — slave probe, register read/write, power-rail enable bitmask, PMIC interrupt sources (button press / thermal / UVLO under-voltage lockout / RTC alarm) + acknowledge, gas-gauge battery read (mAh/mV/temp), arbitration-loss retry.
spmi_init(), spmi_probe(slave_id), spmi_reg_read(slave, reg), spmi_reg_write(slave, reg, val), spmi_rail_enable(mask), spmi_irq_read(), spmi_irq_ack(source), spmi_battery_read(), spmi_arb_retry(), accessors. SPM init=1 reg=1 irq=1 K.ppc_bat_mmu.sg (0x54F000)
G3/G4 BAT/segment MMU — 4 IBAT + 4 DBAT block address translation maps, 16 segment registers (VSID), SDR1/HTAB (hashed page table) setup, MMU enable (IR/DR bits in MSR), PTE insert/evict (HTAB primary+secondary group), DSI page fault handler, TLB flush (tlbie/tlbsync).
bat_init(), bat_ibat_set(idx, upper, lower), bat_dbat_set(idx, upper, lower), bat_segment_set(sr, vsid), bat_sdr1_set(htab_base, mask), bat_mmu_enable(), bat_pte_insert(vsid, page, rpn, flags), bat_pte_evict(vsid, page), bat_dsi_fault(dar, dsisr), bat_tlb_flush(ea), accessors. BAT init=1 mmu=1 pte=1 K.Arch matrix now at 0x54F000.