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HAL Batch 23 — AOP/SCC + PMGR/PowerTune + Watchdog/NVRAM

June 23, 2026 · Sigil-Docs · sigil-kernel 27d9f94 + 6c71fd3 + 2d054ab
kernelhalapple-siliconpowerpchardware0.7.0

Three sigil-kernel commits extend the HAL arch matrix from 0x542000 to 0x547000, adding 6 seams: Apple Always-On Processor, G3/G4 Z85C30 SCC serial, Apple PMGR power/clock manager, G5 970 PowerTune DVFS, Apple watchdog timer, and G3/G4/G5 NVRAM/PRAM/RTC.

27d9f94 — AOP + Z85C30 SCC serial

apple_aop.sg (0x542000)
Always-On Processor — low-power island: Hey-Siri always-listen with false-positive rejection, sensor aggregation (lux/lid), wake-source arbitration, low-power audio path, AP mailbox IPC. aop_init(), aop_siri_listen(), aop_siri_reject(), aop_sensor_update(type, value), aop_wake_arbitrate(source), aop_audio_lowpower(v), aop_ap_mailbox(msg), accessors. AOP init=1 siri=1 wake=1 K.
ppc_scc.sg (0x543000)
Z8530/Z85C30 SCC — dual-channel async UART (modem + printer), LocalTalk HDLC framing via DBDMA, flow control (RTS/CTS), framing/overrun error counters. scc_init(), scc_uart_tx(channel, byte), scc_uart_rx(channel), scc_localtalk_frame(data, len), scc_flow_control(channel, rts), scc_framing_error(), scc_overrun_error(), accessors. SCC init=1 ser=1 hdlc=1 K.

6c71fd3 — PMGR + G5 970 PowerTune

apple_pmgr.sg (0x544000)
PMGR power/clock manager — per-domain power/clock gating (16 blocks), reset sequencing, P/E-core DVFS (freq+voltage), deep-sleep S2R (suspend-to-RAM). pmgr_init(), pmgr_domain_enable(domain), pmgr_domain_disable(domain), pmgr_reset_sequence(domain), pmgr_dvfs_set(core_type, freq_mhz, voltage_mv), pmgr_deep_sleep(), accessors. PMG init=1 dom=1 dvfs=1 K.
ppc_powertune.sg (0x545000)
970FX/970MP PowerTune DVFS — discrete P-states (full/half/quarter), per-core scaling on 970MP via SCOM, nap idle mode, thermal downclock with voltage sequencing. powertune_init(), powertune_set_pstate(core, state) (FULL=0, HALF=1, QUARTER=2), powertune_nap(core), powertune_thermal_downclock(core, temp_c), accessors. PTU init=1 ps=1 nap=1 K.

2d054ab — Watchdog/RTC + NVRAM/PRAM

apple_wdt.sg (0x546000)
Watchdog timer — pet/refresh, bark→bite reset on timeout, boot-vs-runtime WDT handoff, scheduler tick integration, RTC, absolute wake timer. wdt_init(timeout_ms), wdt_pet(), wdt_bark(), wdt_bite_reset(), wdt_handoff(boot_to_runtime), wdt_sched_tick(), wdt_rtc_read(), wdt_wake_timer_set(abs_time), accessors. WDT init=1 pet=1 wake=1 K.
ppc_nvram.sg (0x547000)
NVRAM/PRAM/RTC — OpenFirmware variable get/set (boot-device, boot-args), legacy PRAM bytes (256 B), RTC read/set, XPRAM checksum, zap-to-defaults (Cmd-Opt-P-R), battery-low flag. nvram_init(), nvram_of_get(key), nvram_of_set(key, value), nvram_pram_read(offset), nvram_pram_write(offset, byte), nvram_rtc_read(), nvram_rtc_set(time), nvram_zap(), nvram_battery_low(), accessors. NVR init=1 of=1 zap=1 K.

Arch matrix now at 0x547000.