HAL Arch Matrix — 50 Pairs · 100 Seams · 0x4E0→0x51D (sigil-kernel 1433ccd→a0e8aca)

Four sigil-kernel commits close a landmark in the HAL arch matrix: 50 Apple Silicon ↔ PowerPC paired seams, 100 seams total, spanning 0x4E0000 through 0x51D000. The batch adds 8 seams: Apple Media Engine hardware codec accelerator, G3 Grackle MPC106 host bridge, Apple Sidecar/Universal Control virtual display, UniNorth 2 DART IOMMU, Apple AMX2 matrix coprocessor, G3 Grand Central/Heathrow south bridge, Apple Display Coprocessor IPC link, and UniNorth 2 AGP+PCI-X host bridge.

Section 1: 1433ccd — Media Engine + G3 Grackle

apple_medeng.sg (0x516000) — ProRes/HEVC/H264/AV1 hardware accelerator (8-slot session table, codec frame counters, power budget)

medeng_init()

Zeros state; clears all session slots.

medeng_session_open(codec)

Opens an encode/decode session — codec: ProRes=0, HEVC=1, H264=2, AV1=3; stores in one of 8 session slots.

medeng_encode_frame(session, bytes)

Encodes a frame for session; increments enc_frames[codec]; if codec==ProRes increments prores_frames; sets ENCODING=1 during the call; adds to power_budget_mw.

medeng_decode_frame(session, bytes)

Decodes a frame; increments dec_frames[codec].

medeng_session_close(session)

Frees the session slot.

medeng_enc_frames(codec) / medeng_dec_frames(codec) / medeng_prores_frames() / medeng_power_mw() / medeng_encoding()

Accessors. MEN init=1 enc=1 dec=1 K.

ppc_grackle.sg (0x517000) — G3 MPC106 Grackle host bridge (60x bus, DRAM, 3-slot PCI, dual IDE)

grackle_init(bus_mhz)

Initialises for 66 or 50 MHz 60x bus. The MPC106 "Grackle" is the host bridge on Power Mac G3 systems — it interfaces the 60x bus (PowerPC G3 system bus) at 66 or 50 MHz to DRAM and PCI.

grackle_dram_init(size_mb)

Initialises DRAM controller with size_mb megabytes.

grackle_pci_enumerate()

Enumerates up to 3 PCI slots; records a bitmask of present slots in pci_slot_mask.

grackle_pci_config_read(slot, reg) / grackle_pci_config_write(slot, reg, val)

Reads or writes a PCI config space register for slot; increments pci_config_reads / pci_config_writes.

grackle_ide_attach(channel, device)

Attaches an IDE device (0=master, 1=slave) on channel 0 or 1; sets the corresponding bit in ide_bitmask.

grackle_pci_slot_mask() / grackle_ide_bitmask() / grackle_pci_config_reads()

Accessors. GRK init=1 pci=1 ide=1 K.

Section 2: aac4d5f — Sidecar/Universal Control + UniNorth 2 DART IOMMU

apple_sidecar.sg (0x518000) — Sidecar/Universal Control virtual display (H.265 stream, Apple Pencil, UC HID)

sidecar_init()

Zeros state. Sidecar extends a Mac display to an iPad over Wi-Fi or USB; Universal Control shares keyboard/mouse across devices.

sidecar_connect(width, height)

Connects a Sidecar/UC session — sets connected=1, stores display dimensions.

sidecar_disconnect()

Clears session state.

sidecar_stream_frame(bytes)

Streams one H.265-encoded frame to the iPad; increments frame_count; adds bytes to stream_bytes.

sidecar_pencil_event(x, y, pressure)

Relays an Apple Pencil event (x, y coordinates, pressure 0–255); increments pencil_events.

sidecar_uc_hid_event(type, code)

Relays a Universal Control HID event (keyboard/mouse) to the peer device; increments uc_hid_events.

sidecar_connected() / sidecar_frame_count() / sidecar_pencil_events() / sidecar_uc_hid_events()

Accessors. SCR init=1 con=1 frm=1 K.

ppc_dart.sg (0x519000) — UniNorth 2 DART IOMMU (page table, DMA map/unmap, TLB invalidate, fault capture)

dart_init(pt_base)

Initialises the DART — stores the page table base address. The DART (Device Address Resolution Table) is the IOMMU on UniNorth 2, providing DMA remapping for PCI devices on G4/G5 Macs.

dart_map(iova, pa, pages)

Maps pages pages from I/O virtual address iova to physical address pa; increments map_count; adds pages to mapped_pages.

dart_unmap(iova, pages)

Unmaps pages from iova; decrements mapped_pages (floor at 0).

dart_tlb_invalidate()

Invalidates the TLB; increments tlb_inv_count.

dart_fault(fault_addr)

Records a DMA fault at fault_addr (stores last_fault_addr; increments fault_count).

dart_high_water_mark() / dart_mapped_pages() / dart_fault_count() / dart_tlb_inv_count()

dart_high_water_mark() returns mapped_pages if it exceeds the prior high-water mark. DRT init=1 map=1 flt=1 K.

Section 3: b408a9c — AMX2 coprocessor + G3 Grand Central/Heathrow

apple_amx.sg (0x51A000) — AMX2 hidden SIMD coprocessor (40-reg context save/restore, thread lifecycle, matrix ops)

amx_init()

Zeros state; clears amx_active. AMX (Apple Matrix Extensions) is an undocumented SIMD coprocessor in Apple Silicon, providing very wide matrix operations for ML workloads. AMX2 has 40 registers (X0–X7 row, Y0–Y7 row, Z0–Z63 accumulator, each 512 bits = 64 bytes → 40 × 64 = 2560 bytes total context).

amx_setup()

Sets amx_active=1; increments thread_refcount. AMX is per-thread — the OS must set it up for each thread that uses it.

amx_stop()

Decrements thread_refcount; clears amx_active if refcount reaches 0.

amx_ctx_save(ctx)

Saves the 40-register AMX context (2560 bytes) to ctx; clears amx_active.

amx_ctx_restore(ctx)

Restores 2560 bytes from ctx; sets amx_active=1.

amx_mat_mul() / amx_mat_add()

Proxies for matrix multiply and matrix add operations; increment mul_count and add_count respectively.

amx_active() / amx_thread_refcount() / amx_mul_count() / amx_add_count()

Accessors. AMX init=1 ctx=1 ops=1 K.

ppc_gc_heathrow.sg (0x51B000) — G3 Grand Central / Heathrow south bridge (ADB, SCSI DMA, MACE Ethernet, AWACS, IRQ)

gc_heathrow_init(variant)

Initialises for Grand Central (0) or Heathrow (1). Grand Central (on original Power Mac G3 "beige") and Heathrow (on early G3 "Blue & White" and PowerBook G3 Series) are south bridge ASICs integrating ADB, SCSI, Ethernet (MACE), AWACS audio, and the interrupt controller.

gc_adb_register_device(dev_id)

Registers an ADB device (keyboard, mouse, trackpad) by device ID; increments adb_device_count.

gc_adb_cmd(cmd)

Sends an ADB command; increments adb_cmd_count.

gc_scsi_dma(bytes)

Performs a SCSI DMA transfer; increments scsi_dma_count and scsi_dma_bytes.

gc_mace_tx(bytes) / gc_mace_rx(bytes)

MACE Ethernet transmit/receive; increment respective counters.

gc_awacs_frame()

Advances the AWACS audio frame counter.

gc_irq_dispatch(vec)

Dispatches an IRQ from the Grand Central/Heathrow interrupt controller; increments irq_count. GCH init=1 adb=1 eth=1 K.

Section 4: a0e8aca — Display Coprocessor IPC + UniNorth 2 AGP+PCI-X

apple_dcp_link.sg (0x51C000) — Display Coprocessor IPC link (8-endpoint mask, mode-set, EDID, HDR frames, firmware version)

dcp_link_init(fw_version)

Initialises the DCP link — stores fw_version string. The Apple DCP (Display Coprocessor) is the dedicated display engine on Apple Silicon SoCs — it manages display timing, scaling, HDR, and drives HDMI/DP output. The DCP runs its own firmware and communicates with the kernel via an IPC channel.

dcp_endpoint_open(ep) / dcp_endpoint_close(ep)

Opens DCP endpoint ep (0–7), setting the corresponding bit in endpoint_mask; or clears the bit.

dcp_mode_set(w, h, rate, depth)

Sends a mode-set command — stores width, height, refresh rate (Hz), bit depth.

dcp_edid_read()

Reads EDID from the connected display; increments edid_reads.

dcp_vsync() / dcp_frame_complete() / dcp_hdr_frame()

VSync event (increments vsync_count); frame completion (increments frame_count); HDR frame (increments hdr_frames).

dcp_endpoint_mask() / dcp_vsync_count() / dcp_frame_count() / dcp_hdr_frames()

Accessors. DCP init=1 mde=1 frm=1 K.

ppc_uninorth2.sg (0x51D000) — UniNorth 2 AGP+PCI-X host bridge (AGP8x + 128MB GART, dual PCI bus, DMA tracking)

uninorth2_init()

Zeros state. UniNorth 2 is the north bridge on late-G4 and G5 PowerMacs — it provides an AGP 8x slot (with a 128MB GART aperture for GPU DMA remapping) and two PCI-X buses.

uninorth2_agp_init(aperture_mb)

Initialises the AGP interface — aperture_mb is the GART aperture size (default 128MB); sets agp8x=1.

uninorth2_agp_dma(bytes)

Records an AGP DMA transfer; increments agp_dma_count.

uninorth2_pci_bus_enumerate(bus, device_count)

Enumerates PCI-X bus 0 or 1 with device_count devices found; stores pci_bus_device_count[bus].

uninorth2_pci_config_read(bus, slot, reg) / uninorth2_pci_config_write(bus, slot, reg, val)

PCI-X config read (increments pci_config_reads) and config write (increments pci_config_writes).

uninorth2_pcix_dma(bytes)

PCI-X DMA transfer; increments pcix_dma_count.

uninorth2_agp8x() / uninorth2_agp_dma_count() / uninorth2_pci_bus_devices(bus) / uninorth2_pcix_dma_count()

Accessors. UN2 init=1 pci=1 agp=1 K.

50 Apple Silicon ↔ PowerPC paired seams shipped — 100 seams total, address range 0x4E0000 → 0x51D000.

Arch matrix now at 0x51D000. 50 pairs · 100 seams.