lcars_boot_progress completes the LCARS boot sequence — a gold left-fill progress bar called per kernel init step, positioned below lcars_boot_banner. Together: banner → progress updates → Lumen hands off. sigil-drivers adds the Intel 8237A ISA DMA controller (page registers, flip-flop, mode byte arithmetic, mask/unmask, master reset, x86 QEMU PASS), completing the legacy ISA peripheral set alongside PIT + i8042 + RTC + PIC + UART. (sigil-video 104bc96; sigil-drivers fede276)
lcars_boot_progress (104bc96)
lcars_boot_progress is the kernel-init companion to lcars_boot_banner. The banner paints the splash once; the progress bar is called on each init step to advance the fill. Together they give real hardware a live visual boot status with no compositor, font system, or window manager — only the raw GOP framebuffer.
- Signature:
lcars_boot_progress(fb, pitch, fbw, fbh, bh, value, max)—value/max= current fill fraction - Bar position: derived from boot banner geometry —
bar_y = fbh/2 + bh + gap + bot_h + gap2(sits below the tan bottom band) - Fill: gold (
lcars_gold()) left-fill,value * fbw / maxpixels wide; track: black remainder - GPU path:
gpu_submit(CAP_ACCEL; silicon-pending). SW path:fill_spanrows - Test (160×120, bh=16, value=50, max=100 = 50% fill): fill pixel = gold, track pixel = black, pixel above bar = black
- Result:
LCARS-BOOTPROG-PASS fill=ok track=ok above=ok
Complete boot sequence
The LCARS boot surface is now a two-function API. The pattern for a real x86 kernel bring-up:
lcars_boot_banner(fb, pitch, fbw, fbh, bh) // called once: orange+gold+tan splash
while (init_step < total_steps):
do_init_step(step)
lcars_boot_progress(fb, pitch, fbw, fbh, bh, init_step, total_steps)
// Lumen compositor takes over
This gives real x86 hardware (sigil-os#18) a live boot status without any rendering infrastructure beyond the raw GOP framebuffer — no compositor, no font system, no WM. The progress bar is the last thing the kernel draws before Lumen takes ownership of the framebuffer.
value/max, computes fill width, paints gold fill + black track below the banner. No memory allocation; no state outside the framebuffer.Intel 8237A ISA DMA (fede276 — sigil-drivers)
The 8237A is the ISA DMA controller, gating legacy sound (ISA SB16/AdLib), floppy, and LPT DMA on all x86 PC-compatible hardware. Without the 8237A, drivers that depend on DMA transfers cannot configure their channels.
- Ports:
0x00–0x0F(ch0–3 addr/count/cmd/request/mask/mode/flip-flop/temp/master-reset/all-mask),0x81–0x83(page registers ch2/3/1) - Mask/unmask per channel; flip-flop reset (write 0 to
0x0C); master reset (write to0x0D) - State base: 0x860000
Live QEMU verification:
- Status register = 0 at reset (no TC, no request)
- Page register CH2 round-trip: write
0xAA, read back0xAA - Address flip-flop: write 4660 (two bytes, lo/hi), read back 4660
- Mode byte arithmetic: CH2-read =
0x4A, CH1-sound =0x55, cascade =0xC3
QEMU note: Port 0x0F (all-channel mask) is write-only on real 8237A — QEMU returns 0 on read. The test uses the status register for post-mask verification rather than reading back the mask register directly, matching real-hardware behavior.
The complete ISA peripheral set
With the 8237A DMA controller wired, every ISA peripheral a real x86 kernel needs for initial bring-up is covered by a live-verified sigil-drivers driver:
| Driver | Ports | Class | Function |
|---|---|---|---|
| MC146818A RTC | 0x70/0x71 |
CLS_TIME |
Timekeeping |
| Intel 8042 PS/2 | 0x60/0x64 |
CLS_INPUT |
Keyboard + mouse |
| Intel 8253/8254 PIT | 0x40–0x43 |
CLS_TIME |
Base timer / IRQ0 |
| Intel 8259A PIC | 0x20/0x21, 0xA0/0xA1 |
CLS_IRQ |
Interrupt controller |
| NS16550A UART | 0x3F8 |
CLS_SERIAL |
COM1 serial |
| Intel 8237A DMA | 0x00–0x0F, 0x81–0x83 |
CLS_DMA |
ISA DMA channels |
Every ISA peripheral a real x86 kernel needs to bring up is now covered by a live-verified sigil-drivers driver. The ISA layer is complete.