Four more sigil-kernel commits extend the arch matrix from 0x4CC000 to 0x4D3000, adding 8 HAL seams: Apple Touch ID biometric, G4/G5 AGP host bridge + GART, Apple GMUX display multiplex, PPC OHCI-1394 FireWire, Apple Matrix PMU DVFS, G3/G4/G5 UniNorth/U3/U4 host bridge, Apple SSD controller admin, and G4 standalone PMU. All pass QEMU INIT tests.
7132500 — Touch ID + PPC AGP
apple_touch_id.sg
0x4CC000Touch ID power-button biometric sensor.
tid_power_gate(on): powers the Touch ID sensor module on or off via the T2/SEP power rail. tid_scan_start(): initiates a biometric scan; sets scan_active flag. tid_scan_complete(result): records scan result — TID_MATCH (1) or TID_FAIL (0). Increments retry counter on fail; clears on match. tid_retry_count(): returns current consecutive failure count. tid_lockout(): fires when retry count reaches 6 — sets lockout flag; further scans return TID_LOCKED until tid_lockout_clear() is called. 6-failure lockout matches macOS behavior: 6 failures → passcode required. TID init=1 scn=1 lck=1 K.ppc_agp.sg
0x4CD000G4/G5 AGP 4×/8× host bridge + GART. AGP (Accelerated Graphics Port) is the dedicated GPU bus on G4/G5 Macs.
agp_init(mode): sets AGP mode (4× or 8×). agp_aperture(base, size_mb): sets aperture base address and size (GART window). agp_gart_ptr(ptr, count): sets GART table pointer and entry count. agp_gpu_attach(vid, did): records the GPU vendor/device IDs. agp_bw(): returns unidirectional bandwidth: 4×=1066MB/s, 8×=2133MB/s (as integer). AGP init=1 att=1 gar=1 K.7853a62 — GMUX + PPC FireWire
apple_gmux.sg
0x4CE000Graphics Multiplex controller. GMUX is the discrete/integrated GPU switcher on MacBook Pros and Mac Minis with dual GPU.
gmux_select_igpu() / gmux_select_dgpu(): switches the display output between iGPU and dGPU; increments switch counter. gmux_switch_count(): returns number of GPU switches (used to track wear). gmux_backlight_set(pct): sets backlight PWM level 0–255 (0=off, 255=max). gmux_display_assign(port, output_type): assigns a display port (0=internal eDP, 1=Thunderbolt, 2=HDMI) to the active GPU. GMX init=1 swt=1 bl=1 K.ppc_firewire.sg
0x4CF000OHCI-1394 FireWire host controller. OHCI-1394 is the FireWire host controller on G3/G4/G5 Macs.
firewire_init(): detects FW400 vs FW800 from the controller revision register; sets fw_speed (0=FW400, 1=FW800). firewire_bus_reset(): initiates bus reset; re-enumerates nodes. firewire_node_count(): returns number of discovered nodes after enumeration. firewire_iso_alloc(bw_units): allocates isochronous bandwidth from the 4915-unit budget (4915 units = 80% of 6144-unit max at S400). firewire_iso_free(bw_units): returns units to the budget. FW bandwidth budget: 4915 units = ~393 MB/s for async+iso combined. FW1 init=1 bus=1 iso=1 K.617c8d7 — Matrix PMU + UniNorth
apple_matrix_pmu.sg
0x4D0000M-series power management coprocessor (DVFS). The Matrix PMU is the M-series power management co-processor (distinct from the G4/G5 PMU).
pmu_init(): reads chip ID, sets max P-state. pmu_dvfs_set(p_state): requests a P-state: P0=3228MHz/800mV (performance), P1=2424MHz/750mV, P2=1200MHz/700mV, P3=600MHz/650mV, P4=200MHz/600mV (efficiency). pmu_csleep_arm(): arms the C-state sleep entry (CPU goes to Csleep on next idle). pmu_csleep_wake(wakeup_source): records the wakeup source (IRQ number) and returns from Csleep. pmu_sleep_cycles(): returns total Csleep entry count. PMU init=1 dvf=1 slp=1 K.ppc_uninorth.sg
0x4D1000UniNorth/U3/U4 host bridge + DRAM controller. UniNorth is the North Bridge for G3/G4 (UniNorth 1/2), G5 (U3/U4).
uninorth_init(variant): sets chip-ID variant: UNINORTH1 (0x1181), UNINORTH2 (0x1182), U3 (0x003B), U4 (0x0038). uninorth_dram(base, size_mb, banks, width): records DRAM geometry (base address, total size, bank count, bus width). uninorth_cache(size_kb): records L2 cache size. uninorth_pci_enable() / uninorth_agp_enable(): enables PCI or AGP bus. uninorth_u3_mei_enable(): enables G5 U3 MEI coherency mode (required for SMP). UNI init=1 g5=1 pci=1 K.521df25 — Apple SSD controller + G4 PMU
apple_stor_ctrl.sg
0x4D2000M-series SSD controller admin interface.
stor_init(): probes the SSD controller; reads namespace count and queue-pair count. stor_ns_discover(ns_idx): reads namespace ns_idx — returns capacity (sectors), LBA size, and ns_ready flag. stor_wear_level(): reads controller wear indicator (0–255, 255=new, 0=end-of-life). stor_latency_us(): reads average read latency in microseconds from the controller telemetry log. stor_suspend() / stor_resume(): power-cycles the SSD controller (used on sleep/wake). STC init=1 pwr=1 sus=1 K.ppc_pmu_pmu.sg
0x4D3000G4 standalone PMU (68HC05-based). The G4 PowerBook/iBook PMU is a standalone Motorola 68HC05 co-processor handling battery, RTC, and sleep.
g4pmu_init(): probes PMU ready status. g4pmu_battery(pct, mv, ma, health): reads battery state — charge percentage, voltage (mV), current (mA, negative=discharging), and health (0=fail/1=degraded/2=good). g4pmu_ac_detect(): returns 1 if AC power is connected. g4pmu_rtc_read(): reads Mac-epoch RTC timestamp. g4pmu_idle_sleep_arm() / g4pmu_idle_sleep_cancel(): arms/cancels idle sleep entry. g4pmu_fan_rpm(fan_id): reads tower fan RPM (G4 Power Mac only — fan_id 0=front, 1=rear). G4P init=1 bat=1 slp=1 K.Arch matrix now at 0x4D3000. Batch 4 completes the power management cluster across both architectures: DVFS, DRAM, battery, PMU, SSD, and display routing all have seams.